#include <xc.h>
#include "dma.h"

void DMA_Initialize_g(void) 
{ 
    // Initialize channels which are enabled 

    // AMODE Peripheral Indirect Addressing mode; CHEN disabled; DIR Reads from peripheral address, writes to RAM address; HALF Initiates interrupt when all of the data has been moved; SIZE 16 bit; NULLW disabled; MODE Continuous, Ping-Pong modes are disabled; 
    DMA0CON= 0x20 & 0x7FFF; //Enable DMA Channel later;
    // FORCE disabled; IRQSEL ECAN1 RX; 
    DMA0REQ= 0x22;
    // CNT 7; 
    DMA0CNT= 0x7;
    // STA 4096; 
    DMA0STAL= 0x1000;
    // STA 0; 
    DMA0STAH= 0x0;
    // Clearing Channel 0 Interrupt Flag;
    IFS0bits.DMA0IF = false;
    // Enabling Channel 0 Interrupt


    // AMODE Peripheral Indirect Addressing mode; CHEN disabled; SIZE 16 bit; DIR Reads from RAM address, writes to peripheral address; NULLW disabled; HALF Initiates interrupt when all of the data has been moved; MODE Continuous, Ping-Pong modes are disabled; 
    DMA1CON= 0x2020 & 0x7FFF; //Enable DMA Channel later;
    // FORCE disabled; IRQSEL ECAN1 TX; 
    DMA1REQ= 0x46;
    // CNT 7; 
    DMA1CNT= 0x7;
    // STA 4096; 
    DMA1STAL= 0x1000;
    // STA 0; 
    DMA1STAH= 0x0;
    // Clearing Channel 1 Interrupt Flag;
    IFS0bits.DMA1IF = false;
    // Enabling Channel 1 Interrupt


    // AMODE Register Indirect with Post-Increment mode; CHEN disabled; SIZE 16 bit; DIR Reads from peripheral address, writes to RAM address; NULLW disabled; HALF Initiates interrupt when all of the data has been moved; MODE Continuous, Ping-Pong modes are disabled; 
    DMA2CON= 0x0 & 0x7FFF; //Enable DMA Channel later;
    // IRQSEL SPI2; FORCE disabled; 
    DMA2REQ= 0x21;
    // CNT 0; 
    DMA2CNT= 0x0;
    // STA 4096; 
    DMA2STAL= 0x1000;
    // STA 0; 
    DMA2STAH= 0x0;
    // Clearing Channel 2 Interrupt Flag;
    IFS1bits.DMA2IF = false;
    // Enabling Channel 2 Interrupt


    // MODE Continuous, Ping-Pong modes are disabled; AMODE Peripheral Indirect Addressing mode; CHEN disabled; HALF Initiates interrupt when all of the data has been moved; SIZE 16 bit; DIR Reads from peripheral address, writes to RAM address; NULLW disabled; 
    DMA3CON= 0x20 & 0x7FFF; //Enable DMA Channel later;
    // IRQSEL ADC1; FORCE disabled; 
    DMA3REQ= 0xD;
    // CNT 7; 
    DMA3CNT= 0x7;
    // STA 4096; 
    DMA3STAL= 0x1000;
    // STA 0; 
    DMA3STAH= 0x0;
    // Clearing Channel 3 Interrupt Flag;
    IFS2bits.DMA3IF = false;
    // Enabling Channel 3 Interrupt


}